| Board and System Level DFT Training Lecture |
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| Copyright ©2009 JEK Technical Services LLC All Rights Reserved. |
| Baseline Course material provided in cooperation with Dr. R. G. “Ben” Bennetts, retired DFT Consultant. |
Designing Testable Boards and Systems using Standard Design-For-Test (DFT) Techniques
TARGET AUDIENCE: Digital board/system designers, field-service and test engineers, project managers, product
support engineers.
1/2 Day
A Historical view of Manufacturing Test
The Evolution of In-Circuit & Design-For-Test (DFT) Techniques
DFT solutions for real problems
1 Day
Overview Course on Board & System Level Boundary Scan
Design-For-Test (DFT) & Test Implementation.
1/2 Day
Advanced Applications of formalized DFT.
1532 In System Configuration (ISC), IEEE 1149.6 Advanced
I/O test, Embedded Scan, System Test, SJTAG, P1581, P1687.
TARGET AUDIENCE: Digital board/system designers, field-service and test engineers, project managers, product
support engineers.
1/2 Day
A Historical view of Manufacturing Test
The Evolution of In-Circuit & Design-For-Test (DFT) Techniques
DFT solutions for real problems
1 Day
Overview Course on Board & System Level Boundary Scan
Design-For-Test (DFT) & Test Implementation.
1/2 Day
Advanced Applications of formalized DFT.
1532 In System Configuration (ISC), IEEE 1149.6 Advanced
I/O test, Embedded Scan, System Test, SJTAG, P1581, P1687.
Course content can be customized to your specific requirements. Durations & content depths can vary based on your specific
needs. Typical Course shown. If we cannot provide your requirement, we may be able to refer you to an expert who can.
needs. Typical Course shown. If we cannot provide your requirement, we may be able to refer you to an expert who can.